資料介紹
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74LVC1T45 is designed so that the DIR input is powered by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.
NanoFree? package technology is a major breakthrough in IC packaging concepts, using the die as the package.
- 具有可配置電壓轉(zhuǎn)換和3態(tài)輸出的單位雙電源總線收發(fā)器SN74LVC1T45數(shù)據(jù)表
- 具有可配置電平轉(zhuǎn)換的汽車類 Single-Bit 雙電源總線收發(fā)器SN74LXC1T45-Q1數(shù)據(jù)表
- 具有可配置電壓轉(zhuǎn)換和三態(tài)輸出的 SN74LVC1T45 1位雙電源總線收發(fā)器數(shù)據(jù)表
- 收發(fā)器AiP74LVC1T45 AiP74LVCH1T45
- SN74LVC1T45-Q1,pdf(Single-Bit
- SN74AVCH1T45,pdf(Single-Bit Du
- SN74AVC1T45,pdf(Single-Bit Dua
- SN74LVC1G66,pdf(Single Bilater
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- SN74LVC1G373,pdf(Single D-Type
- SN54LVC74A, SN74LVC74A,pdf(DUA
- SN74LVC1G34,pdf(Single Buffer
- SN74LVC1G17,pdf(Single Schmitt
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