本文提出了一種全新的總線可重配置的多處理器架構(gòu)。該架構(gòu)結(jié)合了多核與可重配置
處理器的優(yōu)勢(shì)，具有并行性高、計(jì)算能力強(qiáng)、結(jié)構(gòu)復(fù)雜度低并且應(yīng)用領(lǐng)域廣泛靈活的特點(diǎn)。對(duì)于該架構(gòu)的實(shí)現(xiàn)，本文提出了VHDL 層面的軟件模擬。通過簡化模型，用多個(gè)改進(jìn)后的VHDL 實(shí)現(xiàn)的8051 核以及可重配置的多路開關(guān)進(jìn)行了軟件模擬。
關(guān)鍵詞：可重配置處理器、多核、總線可重配置
Abstract：We put forward a new architecture: Multi-core System with reconfigurable datapath. This architecture combines the advantage of multi-core and reconfigurable processor, possesses characteristic of high parallelism、strong computing ability、low complexity and wide range of flexible application. For the realization of this architecture, we propose a software simulation by VHDL. In the VHDL level, we do software simulation by simplifying the model of architecture and utilizing many improved 8051 cores and reconfigurable multiplex switches.
Key Words：Reconfigurable Processor, Multi-core, Reconfigurable Datapath